Soc-lm32

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Soc-lm32

Release status: unknown [box doku]

Description soc-lm32 is a complete open source "system on a chip" based upon the Lattice Mico32 32 bit RISC CPU core.



Whats this about?[Bearbeiten | Quelltext bearbeiten]

soc-lm32 is a complete open source "system on a chip" based upon the Lattice Mico32 32 bit RISC CPU core. The original version from Lattice Semiconductor does only work on windows and is optimized for the Lattice FPGA toolchain. This version aims for cross-vendor and cross platform compatibility.

Supported Development Boards[Bearbeiten | Quelltext bearbeiten]

This design runs on

Included Preipherals[Bearbeiten | Quelltext bearbeiten]

The following Wishbone components are included:

  • DDR SDRAM controller (see [wiki:wb_ddr] for details)
  • SRAM controller (16bit and 32bit databus width)
  • RS232 Serial communication UART
  • Simple SPI Master
  • Dual 32 bit timer component

Getting the source[Bearbeiten | Quelltext bearbeiten]

Documentation[Bearbeiten | Quelltext bearbeiten]

More and better documentation is needed -- But there is the beginnings of a Getting Started Guide

Compiler and Toolchain[Bearbeiten | Quelltext bearbeiten]

Lattice released a patched version of the complete GNU toolchain: gcc/g++, binutils, gdb and newlib. You may want to read the instructions on how to soc-lm32/lm32-toolchain install the crosscompiler.

Projects using soc-lm32[Bearbeiten | Quelltext bearbeiten]

For example, soc-lm32 was used in:

Links[Bearbeiten | Quelltext bearbeiten]